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  cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 1 / 6 skt10100 aj3 cystek product specification 10 a mp . trench schottky untra low rectifier skt10100 aj3 features ? 150 operating junction temperature ? softest, fast switching capability ? reduced ultra - low forward voltage drop (vf ) ; better ef ficiency and cooler operation. ? lead - free finish; rohs compliant ? halogen and antimony free. green device ? trench technology provides a superior avalanche capability mechanical data ? case: to - 252 m olded plastic ? weight: 0.34 grams approximately ? term inals: pure tin plated, lead - free, solderable per mil - std - 750 method 2026 ? epox y: ul 94v - 0 rate flame retardant ? polarity : as marked. equivalent circuit outline to - 252 i f(av) 10a v rrm 100v v f at 125 c 0. 58 v tj 150 c
cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 2 / 6 skt10100 aj3 cystek product specification ma ximum ratings and electrical characteristics ( rating at 25 ? c ambient temperature unless otherwise specified. single phase, half wave, 60hz, resistive or inductive load. for capacitive load, derate current by 20%. ) parameter symbol min. typ. max. units maximum dc blocking voltage v dc 100 v maximum recurrent peak reverse voltage v rrm 100 v maximum rms voltage v rms 70 v instantaneous forward voltage at i f = 5 a t c =25 f 0. 54 - v t c =125 0. 50 - instantaneous forward voltage at i f =1 0 a t c =25 f 0. 65 0. 72 v t c =125 0. 58 0.66 maximum instantaneous reverse current at v r = 100 v, t c =25 i r 25 200 a v r = 100 v, t c =125 12 25 ma maximum average forward rectifi ed current i f(av) 10 a non - repetitive peak forward surge current @ i fsm 150 a 8.3ms single half sine wave superimposed on rated load (jedec method) peak repetitive reverse surge current (2us - 1khz) i rrm 2 a st orage temperature range t stg - 5 5 1 50 j - 5 5 1 50 thermal data parameter symbol value unit typical thermal resistance, junction - to - case r th,j - c 3 ? c /w typical thermal resistance, junction - to - ambient r th,j - a 1 25 ? c /w o rdering inf ormation device package shipping sk t10100aj3 - 0 - t3 - g to - 252 (pb - free lead plating and halogen - free package) 25 00/tape & reel environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 1 3 reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 3 / 6 skt10100 aj3 cystek product specification typical characteristics 0 2 4 6 8 10 12 0 25 50 75 100 125 150 175 average forward current --- io(a) case temperature --- t c () forward current derating curve resistive or inductive load 1 10 100 1000 10000 100000 0 0.2 0.4 0.6 0.8 instantaneous forward current --- i f (ma) forward voltage --- v f (v) forward current vs forward voltage pulse width=300s, tj=2 5 c tj=150 tj=75 c tj=125 c tj= - 40 c 0.001 0.01 0.1 1 10 100 1000 10000 100000 1000000 0 20 40 60 80 100 reverse leakage current --- i r (a) reverse voltage --- v r (v) reverse leakage current vs reverse voltage tj=75 tj=25 tj=125 tj=150 c tj= - 40 10000 100000 1000000 10000000 0.1 1 10 100 junction capacitance --- c j (pf) reverse voltage --- v r (v) junction capacitance vs reverse voltage tj=25, f=1.0mhz
cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 4 / 6 skt10100 aj3 cystek product specification recommended solering footprint recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 1 83 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minute s max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 5 / 6 skt10100 aj3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c174j3 issued date : 20 15.04 . 10 revised date : page no. : 6 / 6 skt10100 aj3 cystek product specification to - 252 dimension *: typical dim inches millimeters dim inches millimeters m in. max. min. max. min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b 1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l 2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.030 ref 0.750 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1. controlling dimension: millimeters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 important notice: ? all rights are r eserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in li fe - support applications, or systems. ? cyste k assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.


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